The QAM mapper at the input converts the incoming data bits

into a QAM symbol. Each QAM symbol comprises of two componets namely inphase

(I) and quadrature (Q). These I and Q values of a data bit defines the

amplitude of the pulses given to the pulse shaping filter (S-P).The translation

of the bits to symbol and vice versa are

represented by a symbol map diagram.

IFFT block

returns the value of the normalized discrete, univariate, Inverse fast fourier

transform ot the values given by the pulse shaping filter in addition with the

pulse symbols. AddCP block returns the value of the added cyclic prefix length

to the symbols. It is then inputted to the Digital to Analog converter (DAC)

block. The obtained signal is then modulated to the RF range between 20 KHz to

300 GHz and transmitted over the air.

At the

receiver end the received RF signals are then passed through the analog to

digital converter (ADC) block to get back the pulses from the signals in Time

domain Equalization (TEQ). TEQ is now being widely used due to its simplicity

and ease of implementation. Zero forcing is one of the conventional TEQ

technique which is used to estimate the inverse channel transfer function.

Hence ZF technique is replace by Maximum Likely hood sequence (MLSD) and

Decision feedback Equalization (DFE) techniques.

MLSD is used in low span ISI as its Complexity

increases exponentially with the channel memory, but practically speaking

wireless channel need not to operate in low span ISI hence MLSD is not used. In

contrast DFE provides better performance and robust against ISI when upper

bound is in its maximum speed. Many high speed architecture has been proposed

to overcome the high speed limitation of DFE at the cost of more hardware. The

main idea came up from reformulating the original architecture into arrays of

adders,slicers and multiplexers based on past decisions.

Later FBF

and LUT were presented for low hardware complexity.This is acheived by

precomputing the FBF coefficients in the Lookup table with address lines and

past decisions.The filter coefficient are to be updated with the changing

channel frequently.Thus this category falls under adaptive DFE which is more

complex than non adaptive DFE due to updating time limit.To reduce this

computational complexity relaxed look-ahead technique is used.But the

architechtural complexity increases due to increased multipliers.

The

precomputation technique used here is Distributed Arithmetic which transforms

the Multiply and Accumulate (MAC) units to the look-up table (LUT). In tis

method the filter coefficients and inputs are stored in separate look-up tables

thus increasing the performance efficiency of the filter.In every iteration the

coefficient LUT is updated which consumes time and power.To overcome this

limitation the offset binary coding (OBC) scheme is used.On the whole the

computational complexity is reduced in the tradeoff with circuit complexity.To

overcome this limitation we proposed with low complex high efficient

architehture for both non adaptive and adaptive DFEs using the concept of pre

speed up.

The existing

design requires the feed forward filter output for precomputation of feedback

filter which is not necessary in proposed system.

DECISION FEEDBACK EQUALIZER

In communication equalizers are used to mitigate the ISI and

to recover the originaal transmitted symbols. A linear equalizer is used in series

with the channel to produce an estimated channel inverse transfer function.It

consists of real and complex FIR filters to handle the real and complex data

received. Teh coefficient of these filters are updated using Least mean Square

(LMS) Algorithm.But the performance of the linear equalizer are not very good

with strong distorted cahnnel where noise is also amplified with symbols at

higher frequencies resulting in Inter symbol Interference (ISI). To over come

these limitations DFEs are used. DFEs use the feedback of the received symbol

to produce the estimated channel output. Thus DFE is fed with detected symbols

and produces an estimated output which is subtracted from the output of linear

equalizer.